IBIS Macromodel Task Group

Meeting date: 06 Feb 2007

Members (asterisk for those attending):
* Ambrish Varma, Cadence Design Systems
  Arpad Muranyi, Intel Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
* Doug White, Cisco Systems
* Hemant Shah, Cadence Design Systems
* Ian Dodd, Mentor Graphics
* Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
* Kumar, Cadence Design Systems
* Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
* Radek Biernacki, Agilent (EESof)
  Randy Wolff, Micron Technology
  Richard Ward, Texas Instruments
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence
  Stephen Scearce, Cisco Systems
  Syed Huq, Cisco Systems
* Todd Westerhoff, SiSoft
  Walter Katz, SiSoft
  Vuk Borich, Agilent
  Vikas Gupta, Xilinx

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Call for patent disclosure:

No one declared a patent.

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Opens:

We discussed items from the Feb 1 meeting that require more work:
- Parameter passing questions
- EXE vs. DLL

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Review of ARs:

- Mike: update macro library documentation
  Verilog version almost done.

- Arpad: Write parameter passing syntax proposal for a possible BIRD
  TBD - Someone else could jump in and take this one.

- Todd: finish presentation and send to Bob by tomorrow
  Done

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New Discussion:

Parameters

- The same parameter passing proposed by BIRD for SPICE is in IBIS 5.x
  should be for AMS and LTI modeling too.
- It was noted that the parameter passing mechanism can also pass results
  from the model back to the simulation tool, it is not not just for model
  input.
  - This was noted at the Feb 1 meeting.
  - Ian had presented on this topic at the July 2006 IBIS summit.
    - His proposal included description, type, and range info.
  - Walter had also defined "info" parameters, neither input nor output.
  - We need to decide if pole-zero is one of the parameter formats.
- The decision was made to write separate parameter passing BIRDs:
  - First for channel analysis
  - Second for external circuit

Cadence Proposed BIRD

- Mentor and Cadence should meet to get in synch on the Cadence BIRD.
- Details of these discussions need to be presented to the group.
- Bob Ross suggested it should be a separate multi-lingual chapter of
  the IBIS spec.
- No touching the 3rd rail:
  - We will not change the existing AMS/SPICE portion of IBIS.

AR: Mentor and Cadence will meet to get in synch on the Cadence BIRD.

EXE vs DLL

- An executable (EXE) is fine for Init():
  - It runs only once.
  - Receives input and produces output
  - An EXE is well suited for this.
- On the other hand GetWave() is called repeatedly:
  - For example: 1,000,000 bits, 100 points per UI
    - In theory the whole 1e8 point waveform could be passed to Getwave().
      - That is not efficient in computer science terms
    - Or we could call GetWave() 100 bits at a time
      - Now we have 10,000 transactions
      - EXE startup overhead is a problem.
- A DLL makes multiple processes co-resident in memory
  - Pretty much a function call
  - DLLs are common now, well established
- A pipe is a hybrid approach
  - An EXE communicates to the tool by 2-way socket pipe
  - Not as direct as a function call, but EXE is started only once.
  - Avoids having to compile DLLs with a great variety of switches
  - Adapters could be created to connect DLLs to the tool by pipe if needed.
- The Cadence/SiSoft proposal may not give model vendors the flexibility
  to ship Init() as an EXE and GetWave() as DLL, which they may desire.
- We could require an EXE for Init() and make the DLL optional.
- EDA companies may be able to ask IC vendors to use specific switches.
  - The problem may not be so bad after all.
- We will need some document to explain the computer science part of it.
  - Example models would be best. This should be easy to do.
  - The EDA vendors are in the best position to do this.
  - We could split off working groups to work in parallel.

Plans

- The BIRD should be reworked before next week's meeting.
  - Cadence, Mentor, and SiSoft will meet before next task group meeting.
  - Web sessions may be held this Thu or Fri
- Todd: we also need to revisit the "electrical model stuff"


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Next meeting: 13 Feb 2007 12:00pm PT (light agenda)
              Feb 20: No meeting due to vacations
              Feb 27: Detailed discussion of EDA vendor work